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International Journal of Reconfigurable and Embedded Systems (IJRES)

IJRES
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Published by Institute of Advanced Engineering and Science

ISSN : 20894864 EISSN : 27222608 DOI : -

Core Subject : Economy,

Economics, Econometrics & Finance

The centre of gravity of the computer industry is now moving from personal computing into embedded computing with the advent of VLSI system level integration and reconfigurable core in system-on-chip (SoC). Reconfigurable and Embedded systems are increasingly becoming a key technological component of all kinds of complex technical systems, ranging from audio-video-equipment, telephones, vehicles, toys, aircraft, medical diagnostics, pacemakers, climate control systems, manufacturing systems, intelligent power systems, security systems, to weapons etc. The aim of IJRES is to provide a vehicle for academics, industrial professionals, educators and policy makers working in the field to contribute and disseminate innovative and important new work on reconfigurable and embedded systems. The scope of the IJRES addresses the state of the art of all aspects of reconfigurable and embedded computing systems with emphasis on algorithms, circuits, systems, models, compilers, architectures, tools, design methodologies, test and applications.

Arjuna Subject : -

Articles 5 Documents

Search results for , issue "Vol 2, No 3: November 2013" : 5 Documents clear

FPGA Implementation of Park-Miller Algorithm to Generate Sequence of 32-Bit Pseudo Random Key for Encryption and Decryption of Plain Text Bharatesh N; Rohith S
International Journal of Reconfigurable and Embedded Systems (IJRES) Vol 2, No 3: November 2013
Publisher : Institute of Advanced Engineering and Science

There are many problems arises in randomized algorithms whose solutions are fundamentally based on assumptions that pure random numbers exist, so pseudo-random number generators can imitate randomness sufficiently well for most applications. The proposed scheme is a FPGA implementation of Park-Miller Algorithm for generating sequence of Pseudo-Random keys. The properties like High speed, low power and flexibility of designed PRNG(Pseudo Random Number Generator) makes any digital circuit faster and smaller. The algorithm uses a PRNG Module, it contains 32-bit Booth Multiplier, 32-bit Floating point divider and a FSM module. After generating a sequence of 32-bit Pseudo-Random numbers we have used these numbers as a key to Encrypt 128-bit plain text to become a cipher text and by using the same key to decrypt the encrypted data to get original Plain text. The Programming is done in Verilog-HDL, successfully synthesized and implemented in XILINX Spartan 3E FPGA kit.

Implementation of Video Capture and Playback in Mobile Systems Sanket Dessai; K Ramakrishna
International Journal of Reconfigurable and Embedded Systems (IJRES) Vol 2, No 3: November 2013
Publisher : Institute of Advanced Engineering and Science

Mobile phones are backbone of the mobile communications and have experienced fastest growing segment in the consumer market. In the 3G and 4G mobiles, video recording is an essential entertainment features so the user can record and play the video within the mobile phone. In this paper, video capture and playback implementation had been carried out by integrating the camera module to the GSM phone. An alaysis of the video processing had been carried out. Image sensor and LCD module had been interfaced with the base band processor through the video processor. To interface the different module necessary PCB schematic diagram had been arrived. Software implementation had been carried out for the Human Machine Interface for various settings of the camera module, which is integrated with the video processor. The developed playback system had been tested for the various senerious. In this video has been captured through the camera sensor and at the time of playback measured the resolution, power consumption and image transfer rates of the various modules used in the developed camera phone.

An Efficient Implementation of the Entire Transforms in the H.264/AVC Encoder using VHDL Farhad Rad; Ali Broumandnia
International Journal of Reconfigurable and Embedded Systems (IJRES) Vol 2, No 3: November 2013
Publisher : Institute of Advanced Engineering and Science

The H.264/AVC standard achieves remarkable higher compression performance than the previous MPEG and H.26X standards. One of the computationally intensive units in the MPEG and H.26X video coding families is the Discrete Cosine Transform (DCT). In this paper, we propose an efficient implementation of the DCT, inverse DCTs and the Hadamard transforms in the H.264/AVC encoder using VHDL. The synthesis results indicate that our implementation of the entire transforms achieves lower power, delay and area consumption compared to the existing architectures in the H.264/AVC encoder.

Embedded Linux Based Shopping Assistance System Ayanabha Chakraborty; Prashant Konaje; Prabha Kasliwal
International Journal of Reconfigurable and Embedded Systems (IJRES) Vol 2, No 3: November 2013
Publisher : Institute of Advanced Engineering and Science

In a view to streamline shopping system and facilitate access to required commodities among innumerable varieties in a super market, personalized service can be exploited in automated manner through interactive graphical user interface. Implementation of location based several touch screen modules with a centralized database can provide easy, accurate and timely information in regards to query generated by the users. Availability of an item and its location with absolute identification are displayed on the screen to facilitate users to get access to it immediately. This not only saves valuable time and cumbersome manual procedure in finding desired products but also provides an easy-to-use interactive shopping experience without any effort. Personalized Shopping Assistance maintains a centralized database for all products in the super market with user-friendly graphical user interface touch screen modules at various locations.

FPGA Based Embedded System Development for Rolling Bearings Fault Detection of Induction Motor Shashidhara SM; Sangameswara P Raju
International Journal of Reconfigurable and Embedded Systems (IJRES) Vol 2, No 3: November 2013
Publisher : Institute of Advanced Engineering and Science

Bearing fault diagnosis is crucial in condition monitoring of any rotating machine. Early fault detection in machines can save millions of dollars in maintenance cost. Different methods are used for fault analysis such as short time Fourier transforms (STFT), Wavelet analysis (WA), Model based analysis, cepstrum analysis etc. Recently, there have been outstanding technological developments related to digital systems, in both hardware and software. These innovations enable the development of new designing methodologies that aim to the ease the future modifications, upgrades and expansions of the system. This paper presents a study of rolling bearing fault diagnosis of induction motor based on reconfigurable logic. A case study using FPGA, its design, as well as its implementation and testing, are presented.

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Contact Name
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Journal Mail Official
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Location
Kota yogyakarta,

Daerah istimewa yogyakarta

INDONESIA